Supports standard digital back-end input formats including DEF/Verilog/Liberty/SPEF/VCD/SAIF for seamless integration with the design flow.
Built-in with switching activity probability propagation algorithm. Supports using RTL, and waveform for power calculation, improving analysis efficiency.
GloryWatt’s cutting-edge power modeling technology can transform the intermediary results in power calculation into abstract mathematic models. These can be applied in power calculation adjusted with on-chip temperature, voltage and frequency variations, increasing the speed of integrated simulation by a large scale.
Applicable in low-power design.
Applicable with wire-load models, for convenient assessment of post-synthesis power.
GloryWatt
Full-chip Power Signoff Tool
Overview
GloryWatt offers signoff-precision level power analysis engine. After reading in design netlist, liberty, waveform files, GloryWatt can precisely calculate the design’s average and peak power under given scenarios. This helps designers verify design’s power, locate power violations and fix bugs.
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GloryWattFull-chip Power Signoff Tool
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