Phlexing specializes in the Signoff field of chip design including SoC, ASIC, Memory, Custom and AMS chips, developing tools for analyzing power integrity, signal integrity, parasitic parameter extraction, power, reliability, static timing analysis, substrate noise, physical domain analysis, process design optimization, etc. With our edge in software algorithm and IC design, we strive to enrich our solutions and to lead the EDA industry in the post-Moore era.
High Accuracy Full-Chip Parasitic Extraction Solution
GloryEX offers high-performance parasitic RC extraction with Signoff accuracy for IC designs. It builds physical effects modeling at advanced process nodes. It models deep-submicron complex structures’ physical effects using an ultra-high-precision 3D solver.
GloryEX pioneers a unified 3D and 2.5D capacitance modeling technique with great speed and accuracy, and it also offers innovative compact 2.5D pattern matching technology to extract parasitics of ultra-large-scale system. GloryEX integrates 3D and 2.5D parasitic extraction modeling in parallel to provide transistor and gate level extraction with end-to-end runtime parameters, and it supports taking Signoff specifications from design users. The built-in 3D field solver, as a golden reference tool, extracts the highest accuracy of parasitics in the EDA industry. GloryEX develops its own integrated 2.5D and 3D tech file which is compatible with other mainstream tech files.
Full-Chip Power EM/IR Reliability Signoff Solution
GloryBolt is the industry’s gold-standard EM/IR tool for power, EM and static/dynamic IR drop analysis. GloryBolt supports full-chip power grid and signal reliability analysis for designs with hundreds of millions of instances. GloryBolt has built-in powerful full-chip modeling and simulation engine, which enable the full-chip analysis of power, IR drop and EM (electro-migration) to achieve Signoff accuracy. GloryBolt also provides user-friendly interface and displays various formats of analysis data. The data assist designers to evaluate the quality of their designs in an easy-to-understand way and perform to-the-point debug and optimization.
Multi-Physics Domain-Coupling Analysis for 3D IC and Chiplet
PhyBolt provides a complete power and thermal coupling solution for chip integration and packaging, with its built-in solvers capable of simulating electron conducting behaviors accurately. PhyBolt supports user-defined parameters settings, and provides optimized input set based on accuracy requirements and computing capacity. Embedded with a pool of thermal models, PhyBolt supports different formats of CAD files and GDS files inputs.
PhyBolt equips with Signoff accuracy power computing modes, allowing seamless integration with power-thermal simulation. Its power computing adjusts to on-chip thermal levels to improve simulation accuracy. PhyBolt’s power-thermal conductivity models allow users to quickly assess chips’ power-thermal conditions under different voltage, frequency and process corners.