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GloryEX3D®
Device-Level High-Efficiency Parasitic Field Solver

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GloryEX3D®

GloryEX3D is a device-level, high-efficiency parasitic field solver—the device-level accuracy foundation of the τ-Aware ToolFramework. Based on the Random-Walk algorithm, it efficiently solves Maxwell's equations for parasitic extraction of complex 3D structures. It supports advanced process structures including FinFET, GAA, CFET, planar MOSFET, and nanosheet, with accuracy down to 0.1 nm.

Key Features

Standard-cell and SRAM characterization: Supports standard-cell and SRAM characterization and capacitance solving for critical paths.
Accurate critical-net capacitance extraction: Supports precise extraction of total capacitance (Total-Cap) and coupling capacitance (Coupling-Cap).
Multi-scale modeling: Supports multi-scale modeling from BEOL, Pcell, and standard cell up to SRAM arrays, enabling analysis and optimization at different hierarchy levels.
Advanced process structure support: Supports parasitic extraction for planar MOSFET, FinFET, nanosheet, and CFET processes, with accuracy down to 0.1nm.
Deep correlation with foundry golden data: Accuracy certified by multiple tier-1 foundries.
High parallelism and low memory:Low memory footprint with powerful parallel and hierarchical compute capabilities, scaling to thousands of CPU cores.
3D graphical viewer: Lisplays precisely modeled process data charts and 3D structures, with accurate characterization of conductor and dielectric parameters.
Tech file encryption: Supports tech file encryption to ensure foundry process-information

Products Highlights

01

Accurate modeling of advanced process structures
Supports FinFET, GAA, CFET, planar MOSFET, and nanosheet structures with accuracy down to 0.1 nm, precisely describing manufacturing process effects.

02

High-accuracy, high-efficiency 3D solver
Combines advanced algorithms with high-performance parallel computing; supports cross-scale modeling across BEOL, Pcell, standard cell, and SRAM-array levels; scales to thousands of CPU cores with low memory consumption.

03

Powerful GUI
Innovatively combines the viewer module with the Tech File Editor for an intuitive "edit-and-see" experience that significantly simplifies the modeling flow; supports 3DIC process-file display.

04

Deep correlation with foundry golden data
Certified by multiple top foundries, making it a trusted parasitic extraction solution at advanced process nodes.

Applications

Application Scenarios

High-accuracy RC extraction at the single-device, Pcell, standard-cell, and analog-block levels, as well as high-accuracy solving of chip critical paths—delivering signoff-level accuracy.

Anchored in Advanced-Node Signoff ,Empowering aτ-Aware EDA Framework

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