GloryEX3D employs the Random Walk algorithm to efficiently solve Maxwell's partial differential equations for parasitic extraction of complex 3D structures. With excellent parallel scalability, it is ideally suited for parasitic parameter extraction of standard cells and IP blocks, particularly for critical-path parasitic analysis. At advanced process nodes, GloryEX3D ensures extraction accuracy for critical nodes and parameters, with industry-leading solver efficiency and parallel scalability that meets foundry requirements for parasitic model generation. Through precise modeling of Fin structures, Epi layers, and other key device features, GloryEX3D effectively characterizes the electrical properties of Pcells and standard cells, providing a highly reliable parasitic data foundation for chip design.
Precision Modeling for Advanced Process Structures:
GloryEX3D uses the GloryEX Technology File (GTF) as its standard tech file format, capable of describing electrical properties such as resistivity and permittivity across different process layers with sub-nanometer accuracy (down to 0.1nm). Its powerful geometry processing engine supports flexible geometric operations to construct complex structures, ensuring precise modeling of FinFET and other advanced process parasitic parameters.
High-Precision, High-Efficiency 3D Solver:
Combines advanced algorithms with high-performance parallel computing to rapidly extract capacitance and resistance for complex structures while precisely capturing actual process effects and minute parasitic variations, significantly accelerating PDK development efficiency. Supports multi-scale modeling spanning BEOL, Pcell, standard cells through full SRAM arrays, enabling designers to perform accurate analysis and optimization at multiple hierarchy levels. Verified by multiple industry-leading semiconductor companies as a trusted parasitic extraction solution at advanced process nodes.
Powerful GUI with Visual Modeling:
GloryEX3D provides graphical tech file development capabilities through an intuitive GUI with "edit-as-you-view" functionality. Integrating the Viewer module with the tech file Editor module, the tool displays stacked cross-sectional layers and device geometries in real time during tech file development, automatically generating corresponding 3D model structures for real-time design validation. Template command prompts further reduce tech file authoring complexity and accelerate overall development productivity.
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